Cadence Design Systems has launched a broad ecosystem with nine initial printed circuit board (PCB) manufacturing partners to enable customers to easily get the partners’ technology files they need to ensure PCB design manufacturability early in the design process. This reduces rework, shortens design cycles, and accelerates new product introduction. Customers have received savings from half to two-thirds fewer technical queries (TQs) from manufacturers when they’ve used the Cadence DesignTrue DFM (design for manufacturability) technology due to using tailor-made spacing, annular ring, copper features and mask rules to assure they are designing the board correctly the first time.
Interesting Features and Nine PCB Manufacturers Already Involved
Cadence DesignTrue DFM functionality flags manufacturing rule violations in real time during the PCB layout process with both the Allegro® and OrCAD design tools. All other PCB design tools demand designers wait until the design is complete to do DFM signoff on manufacturing outputs, which often requires significant rework and schedule delays.
Nine PCB manufacturers have already become Cadence DesignTrue partners, allowing them to distribute their manufacturing rules to Cadence customers. These include Bay Area Circuits, CircuitHub, Mass Design, Multek, OSH Park, Rocket EMS, Sierra Circuits, Tempo Automation and Würth Elektronik.
“Our goal is to improve PCB designer productivity, and this large ecosystem and new web portals allow our customers to significantly shorten their design cycles with the industry’s first real-time in-design DFM checking,” said Steve Durrill, senior product engineering group director at Cadence. “Instead of manually adding the rules to their PCB design environment, now they can quickly download the appropriate file and update as required.”
The Idea
By creating new web portals, Cadence is ensuring that customers can access the latest DFM rules from the PCB manufacturers at the start of their design process. Customers can view participating manufacturers and request DesignTrue DFM technology files directly, eliminating the lengthy and error-prone manual entry of hundreds of rules. DFM rules are checked in real time as part of the PCB layout process, reducing the amount of DFM errors found in the manufacturing output. These checks prevent crucial manufacturing errors and limit iterations required to fix such errors. Partners can use the vendor portal to easily distribute rules that match their post-process DFM checks. Cadence users can take advantage of the customer portal to request and receive the rules they need from the manufacturers.
“The Cadence DesignTrue DFM partner program allows us to easily share our PCB manufacturing rules to Cadence customers,” said Dana Korf, senior director Central Manufacturing Engineering and NPI, Multek. “This ensures our customers are designing to our most up-to-date manufacturing constraints, greatly reducing the number of iterations to address DFM errors that we normally see in the PCB signoff process. This will help our customers get their designs done faster, accelerating new product introduction.”
